8086 microprocessor overview

Paper type: Research,

Words: 1231 | Published: 12.02.19 | Views: 371 | Download now

Computer system

Microprocessor the computer whose whole CPU can be contained using one integrated brake lines. The important features of a microprocessor are the sizes of their internal and external addresses bus and data bus (and instruction), its time clock rate and its instruction established.

Major Features

8086 Microprocessor is a 16-bit microprocessor. It is the greatest data carrying capacity of 8086. Yet , it can deal with 8-bit info as well.

There are 20 address lines for 8086. Address lines define simply how much memory the processor may access. In cases like this, it is 220=1 Mb memory.

Functioning frequency= 5 MHz

It has 14 16-bit registers.


Basic architecture of 8086 Processor

The interior architecture of 8086 Processor is essentially split up into 2 parts viz.

  • Bus Software Unit (BIU)
  • Execution Unit (EU)
  • Tour bus Interface Unit

    This handles all data and addresses for the buses intended for the Execution Unit we. e. this sends out addresses, fetches recommendations from memory, reads info from plug-ins and memory space and publishes articles data to ports and memory. BIU also produces the 20-bit physical address.

    The BIU consists of a quantity of functional teams or parts such as:

    • Instruction Queue. It prefetches 6 instruction bytes from memory to the queue of processor. It is a FIFO kind of buffer.
    • The flow of operation is such: Memory ->Queue ->EU

      It simply reads the instruction from the instruction for a when the EUROPEAN UNION is looking forward to the next instructions. It is faster than sending address to system memory space and then attractive the training. Queue uses the concept of pipelining.

    • Segmentation. Memory staying divided into smaller segments is usually segmentation.

    BIU contains four 16-bit subscribes, namely:

  • Code Portion (CS): Intended for addressing a memory position where executable program can be stored.
  • Data Part (DS): Consists of most info used by this program. It holds the offset address.
  • Collection Segment (SS): A section of memory to maintain addresses and data while a subprogram executes.
  • Extra Segment (ES): Additional data portion used to maintain extra vacation spot data. Each register can hold 64kb data.
  • Teaching Pointer: It can be present below the segment enroll. The IP holds the 16-bit address of the following code byte within the code segment.

    Execution Unit

    It basically does the arithmetic and logical calculations. It tells the BIU best places to fetch recommendations from, this decodes the instructions and executes all of them.

    The EU, just like BIU, as well consists of a volume of components, such as:

    • Arithmetic Reasoning Unit: Truly does all math and logical calculations.
    • Control Unit: Performs various internal operations.

    The EU likewise consists of signs up which are:

    • General Purpose Register: Employed for temporary safe-keeping of 8-bit data 2.
    • Banner Register: A flip-flop indicating occurrence of any condition during setup of an instructions.

    There are two types: a) Control Flags, b) Conditional Flags

    Practical Registers

    8 practical registers:

  • AX Register: Accumulator which retailers operands for arithmetic computations.
  • BX Sign-up: Base signup holding starting address of memory place.
  • CX Signup: Used to shop loop counter-top in loop instruction.
  • DX Register: Consists of i/o slot address for i/o instructions.
  • Stack Pointer Register

    The collection pointer (SP) register provides the 16-bit counteract from the start with the segment to the memory location where a phrase was most recently stored for the stack. Recently used addresses is stored on top of the stack.

    Other subscribes such as the SI, DI, BP are also used for temporary storage area purposes.

    Flag Signup:

    Conditional Red flags: Indicate event of mathematical operations. They are:

    • Hold Flag (CF): Indicates in the event carry can be generated in MSB position.
    • Additional Flag (AF): Performs Binary to BCD conversion.
    • Parity Banner (PF): Indicates parity of the result.
    • Zero Flag (ZF): It really is high in case the result of procedure is actually zero.
    • Sign Flag (SF): Signifies the indication magnitude from the result.
    • Overflow Flag (OF): Indicates the exceeding of capacity of machine.

    Control Red flags: They are collection or totally reset to control selected operations in the processor with the aid of specific user-input instructions in the program. They are really:

    • Trap Flag (TF): Allows user to execute one instruction at the same time
    • Interrupt Flag (IF): Allows/prohibits interruption of program
    • Course Flag (DF): Used in line operations.


    The 8086 processor supports 8 types of instructions. They can be:

    Data Transfer Guidelines. These kinds of instructions are more comfortable with transfer the data from the supply operand for the destination operand. Following would be the list of recommendations under this kind of group.

    • MOV Used to replicate the octet or expression from the supplied source towards the provided vacation spot.
    • PPUSH Used to set a word at the top of the collection.
    • POP Used to get a word through the top of the bunch to the offered location.
    • PUSHA Used to put all the signs up into the collection.

    Arithmetic Instructions. These recommendations are used to carry out arithmetic procedures like addition, subtraction, multiplication, division, and so forth

    • ADD Utilized to add the provided octet to byte/word to phrase.
    • SUB Accustomed to subtract the byte from byte/word coming from word.
    • MUL Used to multiply unsigned octet by byte/word by phrase.
    • DIV Utilized to divide the unsigned word by byte or unsigned double expression by word.

    Tad Manipulation Guidance. These kinds of instructions are accustomed to perform procedures where data bits are involved, i. elizabeth. operations just like logical, move, etc .

    • NOT Used to invert every bit of a byte or phrase.
    • AND Used for adding each little in a byte/word with the matching bit within byte/word.
    • OR Used to grow each little bit in a byte/word with the corresponding bit within byte/word.
    • XOR Used to perform Exclusive-OR operation above each bit in a byte/word with the corresponding bit in another byte/word.

    String Guidance. Line is a group of bytes/words and their memory is usually allocated within a sequential buy.

    • ASSOCIATE Used to replicate the offered instruction right up until CX? zero.
    • REPE/REPZ Accustomed to repeat the given instruction until CX = 0 or absolutely no flag ZF = 1 )
    • REPNE/REPNZ Utilized to repeat the given instructions until CX = 0 or actually zero flag ZF = 1 .
    • MOVS/MOVSB/MOVSW Accustomed to move the byte/word from a single string to a different.
    • COMS/COMPSB/COMPSW Used to compare two string bytes/words.

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